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| loginid=songconglin@hongyucom.com,time=2013-01-07 14:30:28,ip=61.235.102.147,doctitle=MT6260 gsm gprs edge-rx soc processor technical brief v0.10 (draft).pdf,company=hongyu_wcx version: 0 .10 release date: 2012 - 12 - 27 ? 2012 mediatek inc. this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. specifications are subject to change without notice. MT6260 gsm/gprs/edge - rx soc processor technical brief (draft) free datasheet http:///
o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; MT6260 gsm/gprs/edge - rx soc processor technical brief v 0 .10 confidential a mediatek confidential ? 2012 mediatek inc. page 2 of 56 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. document revision h istory revision date author description 0. 10 201 2 - 12 - 2 7 alisa huang draft version free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; MT6260 gsm/gprs/edge - rx soc processor technical brief v 0 .10 confidential a mediatek confidential ? 2012 mediatek inc. page 3 of 56 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. table of contents document revision history ................................ ................................ .................... 2 table of contents ................................ ................................ ................................ ..... 3 preface ................................ ................................ ................................ ...................... 5 1 system overview ................................ ................................ ................................ 6 1.1 platform features ................................ ................................ ................................ ................. 10 1.2 modem features ................................ ................................ ................................ ................. 11 1.3 gsm/gprs/edge rf features ................................ ................................ .......................... 12 1. 4 multimedia features ................................ ................................ ................................ ............. 13 1.5 bluetooth features ................................ ................................ ................................ ............... 15 1.6 fm features ................................ ................................ ................................ ......................... 16 1.7 general descriptions ................................ ................................ ................................ ............ 17 2 product descriptions ................................ ................................ ........................ 19 2.1 pin de scription ................................ ................................ ................................ ...................... 19 2.2 electrical characteristics ................................ ................................ ................................ ...... 40 2.3 package information ................................ ................................ ................................ ............. 52 2.4 ordering information ................................ ................................ ................................ ............. 56 lists of tables and figures table 1. pin coordinates ................................ ................................ ................................ ........................ 19 table 2. acronym for pin types ................................ ................................ ................................ .............. 21 ta ble 3. pin function description and power domain ................................ ................................ ............ 21 table 4. acronym for state of pins ................................ ................................ ................................ ......... 27 table 5. state of pins ................................ ................................ ................................ ............................. 27 table 6. acronym for pull - up and pull - down types ................................ ................................ ................ 31 table 7. capability of pu/pd, driving and schmitt trigger ................................ ................................ ..... 32 table 8. absolute maximum ratings for power supply ................................ ................................ ........... 40 table 9. absolute maximum ratings for voltage input ................................ ................................ ........... 41 table 10. absolute maximum ratings for storage temperature ................................ ............................. 41 table 11. recommended operating conditions for power supply ................................ ......................... 41 table 12. recommended operating conditions for voltage input ................................ .......................... 42 table 13. recommended operating conditions for operating temperature ................................ ........... 42 table 14. electrical characteristics ................................ ................................ ................................ ........ 42 figure 1. typical application of MT6260 ................................ ................................ ................................ . 9 figure 2 MT6260 block diagram ................................ ................................ ................................ ........... 18 figure 3. ball diagram and top view ................................ ................................ ................................ ...... 19 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; MT6260 gsm/gprs/edge - rx soc processor technical brief v 0 .10 confidential a mediatek confidential ? 2012 mediatek inc. page 4 of 56 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. figure 4. io types in state of pins ................................ ................................ ................................ ......... 31 figure 5. outlines and dimension of tfbga 9.6mm*8.6mm, 199 - ball, 0.5 mm pitch package ........... 55 figure 6. mass production top marking of MT6260 ................................ ................................ .............. 56 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; MT6260 gsm/gprs/edge - rx soc processor technical brief v 0 .10 confidential a mediatek confidential ? 2012 mediatek inc. page 5 of 56 this document contains information that is proprietary to mediatek inc. unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited. preface acronyms for register types r/w for both read and write access ro read only rc read only. after the register bank is read , e very bit that is high(1) will be cleared to low(0) automatically. wo write only w1s write only. when data bits are written to the register bank, e very bit that is high(1) will cause the corresponding bit to be set to 1. data bits that are low(0) ha ve no effect s on the corresponding bit. w1c write only. when data bits are written to the register bank, e very bit that is high(1) will cause the corresponding bit to be cleared to 0. data bits that are low(0) ha ve no effect s on the corresponding bit. free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; 1 system overview mt62 6 0 is a monolithic chip integrating leading edge power management unit, analog baseband and radio circuitry based on the low - power cmos process. MT6260 is a feature - rich and extremely powerful single - chip solution for high - end gsm/gprs and e dge - rx capability. based on the 32 - bit arm7ej - s tm risc processor, MT6260 s superb processing power, along with high bandwidth architecture and dedicated hardware support, provides a platform for high - performance gprs/edge - rx class 12 modem application and leading - edge multimedia applications. MT6260 also features: ? a highly integrated bluetooth transceiver which is fully complian t with bluetooth specification v 3.0 . ? a fm receiver supporting both audio broadcast de - modulation and rds/rbds data decoding. t ypical application diagram is shown in figure 1 . platform MT6260 is capable of running the arm7ej - s tm risc processor , which provides the best trade - off between system performance and power consumption . for large amounts of data transfer, high - performance dma (direct memory access) with hardware flow control is implemented, which greatly enhances the data movement speed while reducing the mcu processing load. targeted as a media - rich platform for mobile applications, MT6260 also provides hardware security digital rights management for c opyright protection. for further safeguard and to protect the manufacturer s development investment, hardware flash content protection is provided to prevent unauthorized porting of the software load. memory MT6260 supports serial f lash interface with var ious operating frequencies. multimedia the MT6260 multimedia subsystem provides conventional parallel interface and 2 - bit serial interface for cmos sensors. the camera resolution is up to 2 m pixels. the software - based codec can be used to process various video types. besides, MT6260 provides fancy ui capabilities through its hardware 2d accelerator. the 2d accelerator performs high - speed linear transform ation s with filtering. to take advantage of the high mcu performance, gif and png decoders are implement ed by the software. in addition , MT6260 is implemented with a high - performance audio synthesis technology, as well as a high - quality audio amplifier to provide superior audio experience s. connectivity and s torage MT6260 supports uart, usb 1.1 fs/ls , sdio, hif i nterface and mmc/sd storage systems. these interfaces provide MT6260 users with the highest level of flexibility in implementing high - end solutions. to achieve a complete user interface, MT6260 also brings together all the necessary periphera l blocks for a multimedia gsm /gprs /edge - rx phone. the peripheral blocks include the k eypad s canner with the capability to detect multiple key presses , sim c ontroller, r eal - t ime c lock, pwm, s erial /parallel lcd c ontroller and g eneral - p urpose p rogrammable i/os. audio free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; using a highly integrated mixed - signal a udio f ront - e nd, the MT6260 architecture provides easy audio interfacing with direct connection to the audio transducers. the audio interface integrates a/d c onverters for v oice band, as well as high - reso lution s tereo d/a c onverters for both a udio and v oice band. MT6260 supports amr codec to adaptively optimize the quality of speech and audio. moreover, he - aac codec is implemented to deliver cd - quality audio at low bit rates. in addition, a 85 0mw class - a b amplifier is also embedded to save the bom cost of adopting external amplifier s . gsm/gprs/edge - rx r adio MT6260 integrates a mixed - signal baseband front - end in order to provide a well - organized radio interface with flexibility for efficient customization . the front - end contains gain and offset calibration mechanisms and filters with programmable coefficients for comprehensive compatibility control on rf modules. MT6260 achieves outstanding modem performance by utilizing a highly dynamic range adc in the rf downlink path. MT6260 embeds a high - performance and completely integrated single - ended saw - less rf transceiver for multi - band gsm cellular system. in this rf transceiver, a quad - band receiving feature with high sensitivity is supported utilizing one rf receiver and a fully integrated channel filter. with ultra - high dynamic range, the off - chip balun and saw filters on the receiving path can be removed for bom cost reduction. in addition, the minimum component count is guaranteed by realizing a highly int egrated transmitter, low - spur frequency synthesizer and a digitally - controlled crystal oscillator (dcxo). bluetooth radio MT6260 offers a highly integrated bluetooth radio and baseband processor. only a minimum of external components are required. MT6260 provides superior sensitivity and class 1 output power and thus ensures the quality of the connection with a wide range of bluetooth devices. MT6260 is fully compliant with bluetooth v 3.0 and offers enhanced data rates of up to 3mbps. it also provides the coexistence protocol with 802.11 system. MT6260 support s rich bluetooth profiles , enabl ing diversified applications that are widely used on the handset with excellent interoperability. fm radio the fm radio subsystem provides a completely integrated fm r x receiver supporting 87.5 ~ 108 mhz fm bands with 50 k hz tuning step. it also performs fast channel seek/scan algorithm to validate 200 carrier frequencies in 6 seconds. in addition to receiv ing fm audio broadcasting, the digital rds/rbds data system is su pported as well. the integrated fm transceiver utilizes state - of - the - art digital demodulation/modulation techniques to achieve excellent performance . in order to achieve high sinad, good sensitivity and excellent noise suppression, the fm receiver adopts adaptive demodulation scheme to optimize r x system performance in all range s of signal quality by reference of a very sophisticated channel quality index (cqi). when the received signal quality is poor, the design not only enhances the aci rejection capabi lity but also uses a very ingenious skill to soft mute annoying noise so as to provide good perception quality. the fm radio subsystem supports both long antenna, which is usually an earphone, and auto - calibrated short antenna, which is usually a fpc shor t antenna or shared antenna with gsm for different application scenario s. free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; debug ging f unction the jtag interface enables in - circuit debugging of the software program with the arm7ej - s tm core. with this standardized debug ging interface, MT6260 provides dev elopers with a wide set of options in choosing arm development kits from different thir d part y vendors . power m anagement a power management is embedded in MT6260 to provide rich features a high - end feature phone supports, including li - ion battery charger, hig h performance and low quiescent current ldos, and drivers for led and backlight. MT6260 offers various low - power features to help reduce the system power con sumption . MT6260 is also fabricated in an advanced low - power cmos process , hence providing an overall ultra - low leakage solution. package the MT6260 device is offered in a 9.6 mm 8.6 mm , 199 - ball , 0.5mm pitch, tfbga package . free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; figure 1 . typical application of MT6260 m t 6 2 6 0 s e r i a l f l a s h p a s p e e c h / a u d i o o u t p u t ( p c m i n t e r f a c e ) s p e e c h / a u d i o i n p u t k e y p a d s e r i a l f l a s h c o n t r o l l e r a p c b p i s i m 1 u s i m s u p p l y v o l t a g e s j t a g u a r t p o w e r m a n a g e m e n t c i r c u i t r y a u x a d c 1 2 3 4 5 6 7 8 9 * 0 # h i f i s t e r e o o u t p u t f m s t e r e o r a d i o i n p u t d e b u g g e r p w m c h i p r i d a u d i o d a c i 2 s c h a r g e r r ( g b ) l c d c m o s s e n s o r u s b 1 . 1 f / s d e v i c e l c d i n t e r f a c e s w c a m i n t e r f a c e s i m 2 u s i m m m c / s d s d i o r f w i f i 5 9 3 1 a t v s p i d t v i f 2 2 8 4 - s i m 6 3 0 6 i 2 c i n t e r f a c e l c d / n l d i n t e r f a c e g p s 3 3 2 6 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; 1.1 platform features general ? integrated voice - band, audio - band and base - band analog front - end ? integrated full - featured power management unit mcu s ubs ystem ? arm7ej - s tm 32 - bit risc processor ? java hardware acceleration for fast java - based games and applets ? high - performance multi - layer ahb bus ? dedicated dma bus with 15 dma channels ? on - chip boot rom for f actory f l ash p rogramming ? watchdog timer for system crash recovery ? 4 sets of g eneral - p urpose t imer s ? circuit s witch d ata coprocessor ? division coprocessor serial f lash i nterfaces ? support s various operating frequency combinations for s erial f lash ? s upport s qpi and spi s erial f lash user i nterfaces ? 5 - row x 5 - column keypad controller with hardware scanner ? supports multiple key presses for gaming ? dual sim /usim c ontroller with hardware t = 0/t = 1 protocol control ? real - t ime c lock (rtc) operating with a low - quiescent - current power supply ? general - p urpose i/os (gpios) available for auxiliary application s ? 1 sets of pulse width modulation (pwm) o utput ? 10 external interrupt lines ? 1 external channel a uxiliary 10 - bit a/d c onverter security ? supports security key and chip random id connectivity ? 2 uart s with hardware flow control and supports baud rate up to 921 , 600 bps ? fs/ls usb 1.1 d evice controller ? multi m edia c a rd, s ecure d igital memory card, host controller with flexible i/o voltage power ? supports sdio interface for sdio periphera ls as well as wifi connectivity ? dai/pcm and i2s interface for a udio application s ? i 2c master interface for peripheral management including image sensor s ? spi master interface for peripheral management including digital tv chip s power m anagement ? li - ion battery charger ? 14 ldos for the power supply of memory card, camera, bluetooth, rf, sim card and other diversified usage ? 4 o pen - d rain o utput s witches to s upply/ c ontrol the led ? ldo type v ibrator ? one nmos switch to control keypad led ? thermal o verload p rotection ? under - v oltage l ock - out p rotection ? over - v oltage p rotection ? different level s of power - down modes with sophisticated software control e nables excellent power saving performance. test and d ebug ging ? built - in digital and analog loop back modes for both a udio and b aseband f ront - e nd ? dai port compl ies with gsm rec.11.10 . ? jtag port for debugging embedded mcu free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; 1.2 modem features radio i nterface and b aseband f ront - e nd ? d igital pm data path with b aseband f ront - e nd ? high dynamic range delta - sigma adc converts the downlink analog i and q signals to digital b aseband. ? 10 - bit d/a c onverter for automatic power control (apc) ? programmable r adio r x filter with adaptive gain control ? dedicated r x filter for fb acquisition ? 4 - p in baseband parallel interface (bpi) with programmable driving strength ? supports m ulti - band voice and m odem codec ? dial tone generation ? voice m emo ? noise reduction ? echo suppression ? advanced sidetone o scillation r eduction ? digital sidetone generator with programmable gain ? two programmable acoustic compensation filters ? supports gsm/gprs/edge - rx modem ? gsm quad vocoders for adaptive multirate (amr), enhanced full rate (efr), full rate (fr) and half rate (hr ) ? gsm channel coding, equalization and a5/1 , a5/2 and a5/3 ciphering ? gprs /edge - rx gea1 , gea2 and gea3 ciphering ? gprs p acket s witched d ata with cs1/cs2/cs3/cs4 coding schemes ? edge - rx with mcs1 - 9 receiver coding schemes ? gsm c ircuit s witch d ata ? gprs /edge - rx class 12 ? supports saic (s ingle antenna interference cancellation ) technology ? supports vamos(voice services over adaptive multi - user channels on one slot) technology in r9 spec. voice i nterface and v oice f ront - e nd ? t wo microphone inputs shar e one low - noise amplifier with programmable gain and a utomatic g ain c ontrol (agc) mechanisms ? voice power amplifier with programmable gain ? 2 nd order sigma - delta a/d c onverter for voice uplink path ? share s d/a c onverter with audio playback path ? supports full - duplex hands - free operation ? compliant with gsm 03.50 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; 1.3 gsm/gprs/edge rf features receiver ? quad band single - ended input lnas ? quadrature rf mixer ? fully integrated channel filter ? high dynamic range adc ? 24db pga gain with 6db gain step transmitter ? transmitter outputs support quad bands. ? highly precise and low noise rf transmitter for gsm/gprs application s frequency s ynthesizer ? programmable fractional - n synthesizer ? integrated wide range rfvco ? integrated loop filt er ? fast settling time suitable for multi - slot gprs/edge - rx applications digitally - controlled crystal oscillator (dcxo) ? two - pin 26mhz crystal oscillator ? on - chip programmable capacitor array for coarse - tun ing ? on - chip programmable capacitor array for fine - tun ing ? low power mode support s 32k crystal removal free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; 1.4 multimedia features lcd/ wifi i nterface ? dedicated p arallel i nterface supports 3 external devices with 8 - bit for wifi interface and 8 - /9 - bit for paralle l lcd interface. lcd c ontroller ? supports simultaneous connection to 2 parallel and 2 serial lcd modules ? lcm format s supported : rgb565, rgb666, rgb888 ? supports lcd module with maximum resolution up to 480x320 ? per pixel alpha channel ? true color engine ? suppo rts hardware display rotation ? capable of combining display memories with up to 4 blending layers camera interface ? yuv422 format image input jpeg d ecoder ? baseline jpeg decoding ? supports various yuv format s , dc/ac huffman tables and quantization tables jpeg encoder ? motion jpeg encoder for video encoding ? iso/iec 10918 - 1 jpeg baseline mode ? iso/iec 10918 - 2 compliance ? supports yuv420 and grayscale formats ? supports exif/ jfif ? standard dc and ac huffman tables ? provides 5 levels of encode quality ? supports zeros shutter delay image d ata p rocessing ? supports 4x d igital z oom ? high throughput hardware scaler. capable of tailoring an image to an arbitrary size. ? horizontal scaling with bilinear interpolation ? vertical scaling with bilinear interpolation ? yuv and rgb color space conversion ? rgb/ycbcr format thumbnail output mpeg - 4/h.263 codec ? hybrid mpeg4 encoder ? software - based mpeg4 decoder ? iso/iec 14496 - 2 simple profile : ? iso/iec 14496 - 2 advanced simple pro file : ? support s visual tools for decoder: i - vop, p - vop, b - vop, ac/dc p rediction, 4 - mv, u nrestricted mv, e rror r esilience, s hort h eader , global motion compensation, method 1/2 quantization, quarter - pel motion compensation. ? error r esilience for decoder: slice r esynchronization, d ata p artitioning, r eversible vlc ? support s visual tools for encoder: i - vop, p - vop, half - pel, dc p rediction, u nrestricted mv, s hort h eader h.264 ? iso/iec 14496 - 10 baseline profile 2d a ccelerator ? supports 32 - bpp argb8888, 24 - bpp rgb888, 16 - bpp rgb565 , 24 - bpp argb6666. ? 4 layers overlay with individu al color format, window size, source key, constant alpha and rotation ? rectangle fill with constant ? bitblt: c apable with 7 rotation types ? alpha blending with 7 rotation types, per - pixel alpha and pre - multiplied alpha ? font drawing : n ormal font and anti - alias ing font free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; ? linear transform ation : support s perspective transform, truncate/nearest/bi - linear sample filter. audio codec ? supports he - aac codec decod ing ? supports aac codec decod ing ? wavetable synthesis with up to 64 tones ? advanced wavetable synthesizer capable of generating simulated stereo ? wavetable including gm full set of 128 instruments and 47 sets of percussions ? pcm p layback and r ecord ? digital a udio p layback audio i nterface and a udio f ront - e nd ? supports i2s interface ? h igh - resolution d/a c onverter s for s ter eo a udio playback ? voice band a/d converter with digital mic input support ? stereo to mono conversion free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; 1.5 bluetooth features radio features ? fully compliant with bluetooth specification 3.0 + edr ? low out - of - band spurious emissions support simultaneous operation with gps and gsm/gprs worldwide radio systems ? low - if architecture with high degree of linearity and high order channel filter ? integrated t/r switch and balun ? fully integrated pa provides 10 dbm o utput power ? - 9 5 dbm sensitivity with excellent interference rejection performance ? hardware agc dynamically adjusts receiver performance in changing environments baseband features ? up to 4 simultaneous active acl links ? up to 1 simultaneous sco or esco link with cvsd coding ? supports esco ? scatternet support: up to 4 piconets simultaneously with background inquiry/page scan ? supports s niff mode ? afh and pta collaborative support for wlan/bt coexistence ? idle mode and sleep mode enables ultra - low power c onsumption . ? supports pcm interface and built - in programmable transcoders for linear voice with re - transmission ? built - in hardware modem engine for access code correlation, header error correction, forward error correction, crc, whitening and encryption ? chan nel quality driven data rate adaptation ? channel assessment for afh platform features ? embedded processor for bluetooth protocol stack with b uilt - in memory system ? fully verified rom based system with code patch for feature enhancement free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; 1.6 fm features ? 76 - 108m h z worldwide fm bands with 50 k h z tuning step ? supports rds/rbds radio data system ? supports l ong/short antenna ? 40 ms seek time per channel , and 9 sec search time for all channels (87.5~108mhz) ? superior stereo noise reduction ? s oft mute volume control ? support s short antenna, auto calibration for different fm channels ? 60 db sinad with 22.5 k h z fm deviation ? 3 dbuvemf fm rx sensitivity with superior interference rejection ? 20 dbuvemf rds sen sitivity (dev: 2 k h z) ? more than 55dbc rejection capability against - 200 k h z aci free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; 1.7 general descriptions figure 2 error! reference source not found. i s the block diagram of MT6260. based on a multi - processor architecture, MT6260 integrates an arm7ej - s tm core, the main processor running high - level gsm/edge - rx protocol software as well as m ultimedia applications, single digital signal processor core, which manages the low - level modem and advanced audio functions, an embedded processor running bluetooth baseband and link control protocol and the bluetooth radio control. MT6260 consists of th e following subsystems: ? microcontroller unit (mcu) s ubsystem : i nclud es an arm7ej - s tm risc processor and its accompanying memory management and interrupt handling logics ? digital signal processor (dsp) s ubsystem : i nclud es a dsp and its accompanying memory, m emory controller and interrupt controller ? mcu/dsp i nterface : junction at which the mcu and the dsp exchange hardware and software information ? microcontroller p eripherals : i nclude all user interface modules and rf control interface modules ? microcontroller c oprocessors: run computing - intensive processes in place of the m icrocontroller ? dsp p eripherals : h ardware accelerators for gsm /gprs/edge - rx channel codec ? multimedia s ubsystem: i ntegrates several advanced accelerators to support multimedia applications ? voice f ront - e nd : d ata path for converting analog speech to and from digital speech ? aud io f ront - e nd: d ata path for converting stereo audio from an audio source ? baseband f ront - e nd : d ata path for converting a digital signal to and from an analog signal from the rf modules ? timing g enerator : g enerat es the control signals related to the tdma frame timing ? p ower, r eset and c lock s ubsystem : m anag e the power, reset and clock distribution inside MT6260 . ? bluetooth subsystem: i ncludes an embedded processor with embedded rom/ ram system, baseband processor, and a high - performance radio block ? power management unit: s e lf - contained power supply source which also control s the charging and system startup circuitry. details of the individual subsystems and blocks are described in th e following c hapters. free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; figure 2 MT6260 block diagram c a m e r a i n t 2 d l c d c o n t r o l d s p g p s u a r t s i m c a r d 2 m p i x e l c a m e r a h v g a / w v g a l c d s e r i a l f l a s h u s b 1 . 1 s c a l e r i m a g e d m a 8 x 8 q w e r t y k e y p a d t o u c h p a n e l i n t e r n a l m e m o r y i c e m c u m u l t i m e d i a p e r i p h e r a l s m t 6 2 6 0 a n a l o g b a s e b a n d m m c / s d / s d i o c a r d s p e a k e r v o i c e i n g p i o d m a b o o t r o m m m c / s d / s d i o u a r t u s b 1 1 s e r i a l f l a s h c o n t r o l l e r g p t i m e r i n t e r r u p t c o n t r o l l e r k e y p a d g p i o s i m 2 j t a g a r m 7 e j s i 2 c i 2 c s i m c a r d s i m 1 i n t e r n a l m e m o r y i n t e r n a l m e m o r y d s p d m a i n t e r r u p t c o n t r o l l e r p m u p a / a s w a f e v f e b f e b t r f f m r f r f b l u e s y s f m s y s j p e g c o d e c s p i m o b i l e t v free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; 2 product description s 2.1 pin description 2.1.1 ball diagram for mt62 6 0, an tfbga 9.6mm*8.6mm, 199 - ball, 0.5mm pitch package is offered. pin - outs and the top view are illustrated in figure 3 for this package. figure 3 . ball diagram and top view 2.1.2 pin coordination table 1 . pin coordinates pin# net name pin# net name pin# net name a1 avss_2g e5 avss43_pmu m17 lpce1_b a11 urxd2 e7 avss_2g m18 gnd a12 cmpclk f10 vddk m19 gnd a14 cmpdn f14 dvdd18_emi m2 spk_outn a15 cmdat5 f15 dvdd18_emi m3 vbat_spk a17 cmmclk f16 watchdog m6 avss43_pmu a18 kcol1 f17 kcol3 n10 vsim1 a19 gnd f18 sda28 n16 sck a2 rxlb_p f19 edidat n17 swp a3 rxlb_n f2 vcamd n18 nld5 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; pin# net name pin# net name pin# net name a5 avss_2g f4 vref n3 accdet a6 xtal1 f6 batsns n8 vusb a9 dvdd28 f9 avdd28_2gafe n9 vsim2 b1 rxhb_p g10 gnd p1 apc b10 utxd1 g12 gnd p17 shold b11 utxd2 g16 nld1 p18 sfcs0 b12 cmrst g17 nld0 p19 mcins b13 cmdat3 g19 gnd p2 au_micbias1 b14 cmdat0 g2 isink0 p5 hsp b15 cmdat4 g3 isink1 r1 aux_in4 b16 cmvref g4 testmode r14 sim1_sio b17 gpio19 g5 agnd r15 sim2_sio b18 gpio17 g6 isense r16 dvdd33_msdc b19 gpio16 h1 kpled r17 mcda3 b2 rxhb_n h11 gnd r18 sfcs1 b4 tp2 h16 nld7 r19 sin b5 tp4 h17 nld2 r2 au_micbias0 b6 xtal2 h18 lsrstb r3 xp b7 avss_bt h2 isink2 r5 hsn b8 bt_lna h3 isink3 r7 vsf b9 dvdd28_fsrc h4 pwrkey r8 vmc c1 txo_lb j1 drv t1 au_vin0_p c10 bpi_bus0 j10 gnd t10 avss_fm c11 urxd1 j12 gnd t11 fm_ant_n c13 cmdat2 j16 lsce1_b t12 avdd28_fm c14 krow1 j17 lpte t13 usb11_dp c15 cmdat7 j18 nld3 t14 sim1_srst c16 krow2 j19 nld8 t15 sim2_srst c17 krow0 j2 batdet t16 mcda0 c18 kcol4 j3 chr_ldo t17 mccm0 c19 edick j4 vcdt t18 mcda1 c2 txo_hb j6 baton t19 sout c3 avss_2g j7 avss43_pmu t2 au_vin1_n c4 tp1 j9 srclkenai t3 yp c5 tp3 k1 flyn t4 xm c7 clk_sel k10 resetb t5 hpl c8 avss_bt k12 vddk t6 vibr c9 bpi_bus1 k16 lpa0 t8 vio18 d1 avss_2g k17 nld4 t9 vcore d11 bpi_bus3 k18 lprstb u1 au_vin0_n d12 cmdat6 k19 nld6 u11 fm_ant_p d14 dvdd28 k2 flyp u12 gnd d16 scl28 k4 avss43_cp u13 usb11_dm d17 krow4 k7 avss43_pmu u14 sim1_sclk d18 krow3 k9 xtal_sel u16 sim2_sclk d19 ediws l10 xout u17 mcda2 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; pin# net name pin# net name pin# net name d2 avss_2g l16 lwr_b u18 mcck d4 avss_2g l17 lrd_b u19 gnd d6 fref1 l18 lpce0_b u2 au_vin1_p d9 bpi_bus2 l2 vboost u3 ym e1 vcama l3 avdd43_cp u4 avss28_abb e11 cmhref l4 avss43_spk u5 hpr e12 cmdat1 l5 avss43_pmu u6 va e17 kcol0 l8 vrtc u8 vio28 e18 kcol2 l9 xin u9 vbat_digital e2 vrf m1 spk_outp e3 vbat_va m16 dvdd28_sf 2.1.3 detailed pin description table 2 . acronym for pin types abbreviation description ai analog input ao analog output aio analog bi - direction di digital input do digital output dio digital bi - direction p power g ground table 3 . pin function description and power domain pin name type description power domain system resetb dio system reset dvdd18 srclkenai dio 26mhz clock request by external devices dvdd18 gpio16 dio general p urpose i nput / o utput 16 dvdd18 gpio17 dio general p urpose i nput / o utput 17 dvdd18 gpio19 dio general p urpose i nput / o utput 19 dvdd18 edi interface edick dio i2s clock dvdd18 edidata dio i2s data dvdd18 ediws dio i2s word sync dvdd18 rf control circuitr o bpi_bus0 dio rf hard - wire control bus bit 0 dvdd28 bpi_bus1 dio rf hard - wire control bus bit 1 dvdd28 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; pin name type description power domain bpi_bus2 dio rf hard - wire control bus bit 2 dvdd28 bpi_bus3 dio rf hard - wire control bus bit 3 dvdd28 uart interface urxd1 dio uart1 receive data dvdd28 utxd1 dio uart1 transmit data dvdd28 urxd2 dio uart2 receive data dvdd28 utxd2 dio uart2 transmit data dvdd28 keypad interface kcol0 dio keypad column 0 dvdd28 kcol1 dio keypad column 1 dvdd28 kcol2 dio keypad column 2 dvdd28 kcol3 dio keypad column 3 dvdd28 kcol4 dio keypad column 4 dvdd28 krow0 dio keypad row 0 dvdd28 krow1 dio keypad row 1 dvdd28 krow2 dio keypad row 2 dvdd28 krow3 dio keypad row 3 dvdd28 krow4 dio keypad row 4 dvdd28 camera interface cmrst dio cmos sensor reset signal output dvdd28 cmpdn dio cmos sensor power down control dvdd28 cmvref dio cmos sensor vertical reference signal input dvdd28 cmhref dio cmos sensor horizontal reference signal input dvdd28 cmdat0 dio cmos sensor data input 0 dvdd28 cmdat1 dio cmos sensor data input 1 dvdd28 cmdat2 dio cmos sensor data input 2 dvdd28 cmdat3 dio cmos sensor data input 3 dvdd28 cmdat4 dio cmos sensor data input 4 dvdd28 cmdat5 dio cmos sensor data input 5 dvdd28 cmdat6 dio cmos sensor data input 6 dvdd28 cmdat7 dio cmos sensor data input 7 dvdd28 cmpclk dio cmos sensor master clock output dvdd28 cmmclk dio cmos sensor master clock output dvdd28 ms/sd card interface mcins dio sd card detect input dvdd18_emi mcda0 dio sd serial data io 0/memory stick serial data io dvdd33_msdc mcda1 dio sd serial data io 0/memory stick serial data io dvdd33_msdc mcda2 dio sd serial data io 0/memory stick serial data io dvdd33_msdc free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; pin name type description power domain mcda3 dio sd serial data io 0/memory stick serial data io dvdd33_msdc mcck dio sd serial clock/memory stick serial clock dvdd33_msdc mccm0 dio sd command output/memory stick bus state output dvdd33_msdc sim card interface sim1_sio dio sim1 data input/outputs vsim1 sim1_srst dio sim1 card reset output vsim1 sim1_sclk dio sim1 card clock output vsim1 sim2_sio dio sim2 data input/outputs vsim2 sim2_srst dio sim2 card reset output vsim2 sim2_sclk dio sim2 card clock output vsim2 i2c interface scl28 dio i2c clock 2.8v power domain dvdd28 sda28 dio i2c data 2.8v power domain dvdd28 lcd interface lsrstb dio serial display interface reset signal dvdd18_emi lsce1_b dio serial display interface chip select 1 output dvdd18_emi lpce1_b dio parallel display interface chip select 1 output dvdd18_emi lpce0_b dio parallel display interface chip select 0 output dvdd18_emi lpte dio parallel display interface tearing effect dvdd18_emi lprstb dio parallel display interface reset signal dvdd18_emi lrd_b dio parallel display interface read strobe dvdd18_emi lpa0 dio parallel display interface address output dvdd18_emi lwr_b dio parallel display interface write strobe dvdd18_emi nld8 dio parallel lcd data 8 dvdd18_emi nld7 dio parallel lcd data 7 dvdd18_emi nld6 dio parallel lcd data 6 dvdd18_emi nld5 dio parallel lcd data 5 dvdd18_emi nld4 dio parallel lcd data 4 dvdd18_emi nld3 dio parallel lcd data 3 dvdd18_emi nld2 dio parallel lcd data 2 dvdd18_emi nld1 dio parallel lcd data 1 dvdd18_emi nld0 dio parallel lcd data 0 dvdd18_emi watchdog reset watchdog dio reset external memory device dvdd18_emi general purpose i/o interface sfcs1 dio general purpose i nput/ o utput 66 dvdd28_sf free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; pin name type description power domain sfcs0 dio general purpose i nput/ o utput 68 dvdd28_sf sfin dio general purpose i nput/ o utput 70 dvdd28_sf sfout dio general purpose i nput/ o utput 71 dvdd28_sf sfshold dio general purpose i nput/ o utput 72 dvdd28_sf sfwp dio general purpose i nput/ o utput 67 dvdd28_sf sfck dio general purpose i nput/ o utput 69 dvdd28_sf fm rxlna_inn_la ai fm input from long antenna avdd28_fm rxlna_inp_la ai fm input from long antenna avdd28_fm rxlna_inn_sa ai fm input from short antenna avdd28_fm rxlna_inp_sa ai fm input from short antenna avdd28_fm bluetooth btrf2p4g_n aio bluetooth rf single - ended input - btrext aio bluetooth external reference resistor - 2g rf rxhb_p aio differential rf input for highband rx (dcs/pcs) - rxhb_n aio differential rf input for highband rx (dcs/pcs) - rxlb_p aio differential rf input for lowband rx (gsm900/gsm850) - rxlb_n aio differential rf input for lowband rx (gsm900/gsm850) - txo_hb aio rf output for highband tx (dcs/pcs) - txo_lb aio rf output pin for lowband tx (gsm900/gsm850) - fref1 aio dcxo reference clock output - fref2 aio dcxo reference clock output xtal1 aio input 1 for dcxo crystal - xtal2 aio input 2 for dcxo crystal - tp1 aio test pin 1 - tp2 aio test pin 2 - tp3 aio test pin 3 - tp4 aio test pin 4 - clk_sel aio dcxo mode selection - usb usb11_dm aio d - data i nput/ o utput - usb11_dp aio d+ data i nput /o utput - analog baseband hpr aio audio head phone output (r channel) avdd28_abb hpl aio audio head phone output (l channel) avdd28_abb hsp aio voice handset output (positive) avdd28_abb hsn aio voice handset output (negative) avdd28_abb free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; pin name type description power domain au_vin0_p aio microphone 0 input (positive) avdd28_abb au_vin0_n aio microphone 0 input (negative) avdd28_abb au_vin1_p aio microphone 1 input (positive) avdd28_abb au_vin1_n aio microphone 1 input (negative) avdd28_abb aux_in4 aio auxiliary adc input avdd28_abb spk_outp aio speaker positive output avdd28_abb spk_outn aio speaker negative output avdd28_abb apc aio automatic power control dac output avdd28_abb xp aio touch panel x - axis positive input avdd28_abb xm aio touch panel x - axis negative input avdd28_abb yp aio touch panel y - axis positive input avdd28_abb ym aio touch panel y - axis negative input avdd28_abb au_micbias0 aio microphone bias source 0 avdd28_abb au_micbias1 aio microphone bias source 1 avdd28_abb accdet aio accessory detection avdd28_abb real - time clock xin aio input pin for 32k crystal vrtc xout aio input pin for 32k crystal vrtc xtal_sel dio pin option for external 32k crystal vrtc power management unit va aio ldo output for abb - va vbat_analog vbt aio ldo output for btrf - vbt vbat_rf vcama aio ldo output for sensor C vcama vbat_analog vcamd aio ldo output for sensor - vcamd vbat_digital vibr aio ldo output for vibrator - vibr vbat_digital vio18 aio ldo output for 1.8v power - vio18 vbat_digital vio28 aio ldo output for 2.8v power - vio28 vbat_digital vmc aio ldo output for memory card - vmc vbat_digital vsf aio ldo output - vsf vbat_digital vrf aio ldo output for gsmrf - vrf vbat_digital vrtc aio ldo output for rtc - vrtc vbat_digital vsim1 aio ldo output for 1 st sim - vsim vbat_digital vsim2 aio ldo output for 2 nd sim - vsim2 vbat_digital vtcxo aio ldo output for dcxo - vtcxo vbat_analog vusb aio ldo output for usb - vusb vbat_digital vcore aio ldo output for core circuit - vcore vbat_digital vref aio band gap reference batsns vcdt aio charger - in level sense pin batsns drv aio idac current output open - drain pin batsns baton aio battery pack, ntc connected pin batsns free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; pin name type description power domain isense aio top node of current sensing 0.2ohm rsense resistor batsns chr_ldo aio 2.8v shunt - regulator output batsns batdet aio battery detection pin batsns isink0 aio backlight driver channel 0 vbat_spk isink1 aio backlight driver channel 1 vbat_spk isink2 aio backlight driver channel 2 vbat_spk isink3 aio backlight driver channel 3 vbat_spk kpled aio keypad led driver vbat_spk testmode aio test mode batsns pwrkey aio pwr key batsns analog power avdd28_fm p fm power - avdd28_vrf p 2.8v power supply for 2g rf - avdd28_tcxo p 2.8v power supply for 2g tcxo - avdd28_2gafe p 2.8v power supply for 2g afe - avdd28_abb p abb 2.8v power - avdd28_dbt p 2.8v power supply for dbt - avdd28_abt p 2.8v power supply for abt - vbat_rf p rf ldos used battery voltage input - vbat_digital p digital ldos used battery voltage input - vbat_analog p analog ldos used battery voltage input - vbat_spk p vbat input for loud speaker driver - batsns p battery node of battery pack - analog ground avss28_abb g abb 2.8v ground - avss_bt g bt ground - avss_bt1 g bt1 ground - avss_2g g 2g rf ground - avss_fm g fm ground - avss43_pmu g pmu ground - avss43_spk g spk ground - agnd g gnd for vref - digital power dvdd28 p 2.8v power supply for digital macros in transceiver - dvdd18 p 1.8v power supply for digital macros in transceiver - dvdd28_fsrc p e - fuse blowing power control - dvdd33_msdc p 3.3v memory card power - dvdd18_emi p 1.8v emi io power - dvdd28_sf p 2.8v io power - free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; pin name type description power domain dvdd28_sfp p 2.8v io power - vddk p 1.2v core power digital ground gnd g ground - table 4 . acronym for state of pins abbreviation description i input lo low output ho high output xo low or high output pu pull - up pd pull - down - no pu/pd 0~n aux. function number x delicate function pin table 5 . state of pins name reset output drivability termination when not used io type state 1 aux 2 pu/pd 3 system resetb o 1 - dioh6/diol6 no need io type 6 srclkenai i 7 pd dioh6/diol6 no need io type 6 gpio16 i 1 pd dioh2/diol2 no need io type 1 gpio17 i 1 pd dioh2/diol2 no need io type 1 gpio19 i 1 pd dioh2/diol2 no need io type 1 edi interface edick i 0 pd dioh1/diol1 no need io type 1 edidat i 0 pd dioh1/diol1 no need io type 1 ediws i 0 pd dioh1/diol1 no need io type 1 rf control circuitry bpi_bus0 o 1 - dioh1/diol1 no need io type 1 bpi_bus1 i 1 pd dioh1/diol1 no need io type 1 bpi_bus2 o 1 - dioh1/diol1 no need io type 1 bpi_bus3 i 1 pd dioh1/diol1 no need io type 1 1 the column state of reset shows the pin state during reset. (input, high output, low output , etc) 2 the column aux for reset means the default aux function number, shown in the table pin multiplexing, capability and sett ings. 3 the column pu/pd for reset means if there is internal pull - up or pull - down when the pin is input in the reset state. free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; name reset output drivability termination when not used io type state 1 aux 2 pu/pd 3 uart interface urxd1 i 1 pu dioh3/diol3 no need io type 3 utxd1 o 1 - dioh1/diol1 no need io type 1 urxd2 i 0 pd dioh1/diol1 no need io type 1 utxd2 i 0 pd dioh1/diol1 no need io type 1 keypad interface kcol0 i 0 pu dioh4/diol4 no need io type 4 kcol1 i 0 pd dioh4/diol4 no need io type 4 kcol2 i 0 pd dioh4/diol4 no need io type 4 kcol3 i 0 pd dioh4/diol4 no need io type 4 kcol4 i 0 pd dioh4/diol4 no need io type 4 krow0 o 0 - dioh5/diol5 no need io type 5 krow1 i 0 pd dioh5/diol5 no need io type 5 krow2 i 0 pd dioh5/diol5 no need io type 5 krow3 i 0 pd dioh5/diol5 no need io type 5 krow4 i 0 pd dioh5/diol5 no need io type 5 camera interface cmrst i 0 pd dioh1/diol1 no need io type 1 cmpdn o 0 - dioh1/diol1 no need io type 1 cmvref i 0 pd dioh1/diol1 no need io type 1 gmhref i 0 pd dioh1/diol1 no need io type 1 cmdat0 i 0 pd dioh1/diol1 no need io type 1 cmdat1 i 0 pd dioh1/diol1 no need io type 1 cmdat2 i 0 pd dioh1/diol1 no need io type 1 cmdat3 i 0 pd dioh1/diol1 no need io type 1 cmdat4 i 0 pd dioh1/diol1 no need io type 1 cmdat5 i 0 pd dioh1/diol1 no need io type 1 cmdat6 i 0 pd dioh1/diol1 no need io type 1 cmdat7 i 0 pd dioh1/diol1 no need io type 1 cmpclk i 0 pd dioh1/diol1 no need io type 1 cmmclk i 0 pd dioh1/diol1 no need io type 1 ms/sd card interface mcins i 0 pd dioh2/diol2 no need io type 2 mcda0 i 0 pd dioh3/diol3 no need io type 3 mcda1 i 0 pd dioh3/diol3 no need io type 3 mcda2 i 0 pd dioh3/diol3 no need io type 3 mcda3 i 0 pd dioh3/diol3 no need io type 3 mccm i 0 pd dioh3/diol3 no need io type 3 mcmm0 i 0 pd dioh3/diol3 no need io type 3 i2c interface scl28 i 0 pd dioh1/diol1 no need io type 1 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; name reset output drivability termination when not used io type state 1 aux 2 pu/pd 3 sda28 i 0 pd dioh1/diol1 no need io type 1 lcd interface lsrstb i 0 pd dioh2/diol2 no need io type 2 lsce1b o 1 - dioh2/diol2 no need io type 2 lpce0b o 1 - dioh2/diol2 no need io type 7 lpce1b o 1 - dioh2/diol2 no need io type 2 lpte i 0 pd dioh2/diol2 no need io type 2 lprstb i 0 pd dioh2/diol2 no need io type 2 lrd_b i 0 pd dioh2/diol2 no need io type 7 lpa0 i 0 pd dioh2/diol2 no need io type 7 lwr_b i 0 pd dioh2/diol2 no need io type 7 nld8 i 0 pd dioh2/diol2 no need io type 2 nld7 i 0 pd dioh2/diol2 no need io type 2 nld6 i 0 pd dioh2/diol2 no need io type 2 nld5 i 0 pd dioh2/diol2 no need io type 2 nld4 i 0 pd dioh2/diol2 no need io type 2 nld3 i 0 pd dioh2/diol2 no need io type 2 nld2 i 0 pd dioh2/diol2 no need io type 2 nld1 i 0 pd dioh2/diol2 no need io type 7 nld0 i 0 pd dioh2/diol2 no need io type 7 watchdog reset watchdog o 1 - dioh1/diol1 no need io type 1 general purpose i/o interface sfcs0 o 1 - dioh7/diol7 no need io type 7 sfcs1 i 0 pd dioh7/diol7 no need io type 7 sfin i 1 pu dioh7/diol7 no need io type 7 sfout o 1 - dioh7/diol7 no need io type 7 sfshold o 1 - dioh7/diol7 no need io type 7 sfwp o 1 - dioh7/diol7 no need io type 7 sfck o 1 - dioh7/diol7 no need io type 7 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; pad dvo output enable dvdio gndio gndio dvdio pu pd vin input enable io tyep1 pad dvo output enable dvdio gndio gndio dvdio pu pd vin input enable io tyep2 io tyep3 io tyep4 pad dvo output enable dvdio gndio gndio dvdio pu pd vin pad dvo output enable dvdio gndio gndio dvdio pu pd vin free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; figure 4 . io types in state of pins 2.1.4 pin multiplexing, capability and settings table 6 . acronym for pull - up and pull - down types abbreviation description pu pull - up, not controllable io tyep5 io tyep6 pad dvo output enable dvdio gndio gndio dvdio pu pd vin pad dvo output enable dvdio gndio gndio dvdio pu pd vin io tyep7 pad dvo output enable dvdio gndio gndio dvdio pu pd vin free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; abbreviation description pd pull - down, not controllable cu pull - up, controllable cd pull - down, controllable x cannot pull - up or pull - down table 7 . capability of pu/pd, driving and schmitt trigger name aux. function aux. name aux. type pu/pd/ cu/cd driving smt edick 0 gpio0 io cu, cd 4, 8, 12, 16ma 0 1 edick o - 4, 8, 12, 16ma 0 2 pwm o - 4, 8, 12, 16ma 0 3 eint0 i - 4, 8, 12, 16ma 0 edidat 0 gpio61 io cu, cd 4, 8, 12, 16ma 0 1 edidat io cu, cd 4, 8, 12, 16ma 0 2 pwm o - 4, 8, 12, 16ma 0 3 eint8 i - 4, 8, 12, 16ma 0 ediws 0 gpio18 io cu, cd 4, 8, 12, 16ma 0 1 ediws o - 4, 8, 12, 16ma 0 gpio16 0 gpio16 io cu, cd 4, 8, 12, 16ma 0 1 gpsfsync o - 4, 8, 12, 16ma 0 gpio17 0 gpio17 io cu, cd 4, 8, 12, 16ma 0 1 bpibus5 o - 4, 8, 12, 16ma 0 gpio19 0 gpio19 io cu, cd 4, 8, 12, 16ma 0 1 bpibus4 o - 4, 8, 12, 16ma 0 scl28 0 gpio1 io cu, cd 4, 8, 12, 16ma 0 1 scl io cu, cd 4, 8, 12, 16ma 0 4 spisck0 o - 4, 8, 12, 16ma 0 5 d1_ick i pd 4, 8, 12, 16ma 0 sda28 0 gpio2 io cu, cd 4, 8, 12, 16ma 0 1 sda io cu, cd 4, 8, 12, 16ma 0 4 spics0 o - 4, 8, 12, 16ma 0 5 d1_ims i cu, cd 4, 8, 12, 16ma 0 kclo4 0 gpio5 io cu, cd 4, 8, 12, 16ma 0 1 kcol4 io cu, cd 4, 8, 12, 16ma 0 3 eint1 i cu, cd 4, 8, 12, 16ma 0 4 fmjtdi i cu, cd 4, 8, 12, 16ma 0 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; name aux. function aux. name aux. type pu/pd/ cu/cd driving smt 5 jdi i cu, cd 4, 8, 12, 16ma 0 6 btjdi i cu, cd 4, 8, 12, 16ma 0 kcol3 0 gpio6 io cu, cd 4, 8, 12, 16ma 0 1 kcol3 io cu, cd 4, 8, 12, 16ma 0 2 edi2ck o cu, cd 4, 8, 12, 16ma 0 4 fmjtms i cu, cd 4, 8, 12, 16ma 0 5 jtms i cu, cd 4, 8, 12, 16ma 0 6 btjtms i cu, cd 4, 8, 12, 16ma 0 kcol2 0 gpio7 io cu, cd 4, 8, 12, 16ma 0 1 kcol2 io cu, cd 4, 8, 12, 16ma 0 4 fmjtck i cu, cd 4, 8, 12, 16ma 0 5 jtck i cu, cd 4, 8, 12, 16ma 0 6 btjtck i cu, cd 4, 8, 12, 16ma 0 kcol1 0 gpio8 io cu, cd 4, 8, 12, 16ma 0 1 kcol1 io cu, cd 4, 8, 12, 16ma 0 kcol0 0 gpio9 io cu, cd 4, 8, 12, 16ma 0 1 kclo0 io cu, cd 4, 8, 12, 16ma 0 krow4 0 gpio11 io cu, cd 4, 8, 12, 16ma 0 1 krow4 io cu, cd 4, 8, 12, 16ma 0 2 edi2ws o - 4, 8, 12, 16ma 0 3 eint3 i cu, cd 4, 8, 12, 16ma 0 4 fmjtrstb i cu, cd 4, 8, 12, 16ma 0 5 jtrstb i cu, cd 4, 8, 12, 16ma 0 6 btjtrstb i cu, cd 4, 8, 12, 16ma 0 krow3 0 gpio12 io cu, cd 4, 8, 12, 16ma 0 1 krow3 io cu, cd 4, 8, 12, 16ma 0 2 edi2dat o - 4, 8, 12, 16ma 0 4 fmjtdo o - 4, 8, 12, 16ma 0 5 jtdo o - 4, 8, 12, 16ma 0 6 btjtdo o - 4, 8, 12, 16ma 0 krow2 0 gpio13 io cu, cd 4, 8, 12, 16ma 0 1 krow2 io cu, cd 4, 8, 12, 16ma 0 5 jtrck o - 4, 8, 12, 16ma 0 6 btdbgackn o - 4, 8, 12, 16ma 0 krow1 0 gpio17 io cu, cd 4, 8, 12, 16ma 0 1 krow1 io cu, cd 4, 8, 12, 16ma 0 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; name aux. function aux. name aux. type pu/pd/ cu/cd driving smt 5 di_ida io pu, cd 4, 8, 12, 16ma 0 6 btdbgin i cu, cd 4, 8, 12, 16ma 0 krow0 0 gpio15 io cu, cd 4, 8, 12, 16ma 0 1 krow0 io cu, cd 4, 8, 12, 16ma 0 2 lsdi0 i cu, cd 4, 8, 12, 16ma 0 4 clko6 o - 4, 8, 12, 16ma 0 5 lsck0 o - 4, 8, 12, 16ma 0 urxd2 0 gpio20 io cu, cd 4, 8, 12, 16ma 0 1 u2rxd i cu, cd 4, 8, 12, 16ma 0 2 u1rts o - 4, 8, 12, 16ma 0 3 btpri io cu, cd 4, 8, 12, 16ma 0 4 spimisi0 o - 4, 8, 12, 16ma 0 utxd2 0 gpio24 io cu, cd 4, 8, 12, 16ma 0 1 u2txd o - 4, 8, 12, 16ma 0 2 u1cts i pu 4, 8, 12, 16ma 0 3 clko0 o - 4, 8, 12, 16ma 0 4 spimiso0 i pd 4, 8, 12, 16ma 0 urxd1 0 gpio22 io cu, cd 4, 8, 12, 16ma 0 1 u1rxd i pu 4, 8, 12, 16ma 0 4 eint4 i cu, cd 4, 8, 12, 16ma 0 utxd1 0 gpio23 io cu, cd 4, 8, 12, 16ma 0 1 u1txd o - 4, 8, 12, 16ma 0 mcins 0 gpio24 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 eint5 i cu, cd 2,4,6,8,10,12 ,14,16ma 0 mcck 0 gpio25 io cu, cd 4, 8, 12, 16ma 0 1 mcck io cu, cd 4, 8, 12, 16ma 0 5 jrtck o - 4, 8, 12, 16ma 0 mcda0 0 gpio26 io cu, cd 4, 8, 12, 16ma 0 1 mcda0 io cu, cd 4, 8, 12, 16ma 0 4 fmjtrstb i cu, cd 4, 8, 12, 16ma 0 5 jtrst_b i cu, cd 4, 8, 12, 16ma 0 mcda1 0 gpio27 io cu, cd 4, 8, 12, 16ma 0 1 mcda0 io cu, cd 4, 8, 12, 16ma 0 mcda2 0 gpio3 io cu, cd 4, 8, 12, 16ma 0 1 mcda0 io cu, cd 4, 8, 12, 16ma 0 4 fmjtdi i cu, cd 4, 8, 12, 16ma 0 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; name aux. function aux. name aux. type pu/pd/ cu/cd driving smt 5 jtdi i cu, cd 4, 8, 12, 16ma 0 mcda3 0 gpio4 io cu, cd 4, 8, 12, 16ma 0 1 mcda0 io cu, cd 4, 8, 12, 16ma 0 4 fmjtdi i cu, cd 4, 8, 12, 16ma 0 5 jtdi i cu, cd 4, 8, 12, 16ma 0 mccm0 0 gpio27 io cu, cd 4, 8, 12, 16ma 0 1 mccm0 io cu, cd 4, 8, 12, 16ma 0 4 fmjtdo o - 4, 8, 12, 16ma 0 5 jtdo o - 4, 8, 12, 16ma 0 nld8 0 gpio28 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 nld8 io pu, cd 2,4,6,8,10,12 ,14,16ma 0 5 cmmclk o - 2,4,6,8,10,12 ,14,16ma 0 nld7 0 gpio29 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 nld7 io pu, cd 2,4,6,8,10,12 ,14,16ma 0 5 cmcsk i cu, cd 2,4,6,8,10,12 ,14,16ma 0 nld6 0 gpio30 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 nld6 io pu, cd 2,4,6,8,10,12 ,14,16ma 0 5 cmrst o - 2,4,6,8,10,12 ,14,16ma 0 nld5 0 gpio31 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 nld5 io pu, cd 2,4,6,8,10,12 ,14,16ma 0 5 cmcsd0 i pd 2,4,6,8,10,12 ,14,16ma 0 nld4 0 gpio32 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 nld4 io pu, cd 2,4,6,8,10,12 ,14,16ma 0 5 cmpdn o - 2,4,6,8,10,12 ,14,16ma 0 nld3 0 gpio33 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 nld3 io pu, cd 2,4,6,8,10,12 ,14,16ma 0 2 lsdi3 i cu, cd 2,4,6,8,10,12 ,14,16ma 0 5 cmcsd1 i cu,cd 2,4,6,8,10,12 ,14,16ma 0 nld2 0 gpio34 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 nld2 io pu, cd 2,4,6,8,10,12 ,14,16ma 0 nld1 0 gpio35 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 nld1 io pu, cd 2,4,6,8,10,12 ,14,16ma 0 3 sfwp io cu, cd 2,4,6,8,10,12 ,14,16ma 0 nld0 0 gpio36 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 nld0 io pu, cd 2,4,6,8,10,12 ,14,16ma 0 2 lsa0da0 o - 2,4,6,8,10,12 ,14,16ma 0 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; name aux. function aux. name aux. type pu/pd/ cu/cd driving smt 3 sfcs0 o - 2,4,6,8,10,12 ,14,16ma 0 lwr_b 0 gpio37 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 lwrb o - 2,4,6,8,10,12 ,14,16ma 0 2 lsck0 o - 2,4,6,8,10,12 ,14,16ma 0 3 sfck io cu, cd 2,4,6,8,10,12 ,14,16ma 0 lrd_b 0 gpio38 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 lrdb o - 2,4,6,8,10,12 ,14,16ma 0 2 lsda0 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 3 sfin io cu, cd 2,4,6,8,10,12 ,14,16ma 0 lpa0 0 gpio39 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 lpa0 o - 2,4,6,8,10,12 ,14,16ma 0 2 lsdi0 i pd 2,4,6,8,10,12 ,14,16ma 0 3 sfout io cu, cd 2,4,6,8,10,12 ,14,16ma 0 lpce0_b 0 gpio40 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 lpce0b o cu, cd 2,4,6,8,10,12 ,14,16ma 0 2 lsce0b1 o cu, cd 2,4,6,8,10,12 ,14,16ma 0 3 sfhold io cu, cd 2,4,6,8,10,12 ,14,16ma 0 lsce1_b 0 gpio41 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 lsce1b o - 2,4,6,8,10,12 ,14,16ma 0 2 daisync o - 2,4,6,8,10,12 ,14,16ma 0 3 scl io cu, cd 2,4,6,8,10,12 ,14,16ma 0 lpce1_b 0 gpio42 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 lpce1b o - 2,4,6,8,10,12 ,14,16ma 0 2 lpte1 i cu,cd 2,4,6,8,10,12 ,14,16ma 0 3 sda io cu, cd 2,4,6,8,10,12 ,14,16ma 0 lsrstb 0 gpio43 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 lsrstb o - 2,4,6,8,10,12 ,14,16ma 0 watchdog 0 gpio44 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 watchdog o - 2,4,6,8,10,12 ,14,16ma 0 2 lpce2b o cu, cd 2,4,6,8,10,12 ,14,16ma 0 3 eint6 i cu, cd 2,4,6,8,10,12 ,14,16ma 0 lpte 0 gpio45 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 lpte1 i cu, cd 2,4,6,8,10,12 ,14,16ma 0 3 clko1 o - 2,4,6,8,10,12 ,14,16ma 0 lprstb 0 gpio46 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 lprstb o - 2,4,6,8,10,12 ,14,16ma 0 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; name aux. function aux. name aux. type pu/pd/ cu/cd driving smt 2 lpsrstb o - 2,4,6,8,10,12 ,14,16ma 0 4 lpte1 i cu, cd 2,4,6,8,10,12 ,14,16ma 0 5 lpce3b o - 2,4,6,8,10,12 ,14,16ma 0 cmdat0 0 gpio47 io cu, cd 4, 8, 12, 16ma 0 1 cmdat0 i cu, cd 4, 8, 12, 16ma 0 2 cmcsd0 i cu, cd 4, 8, 12, 16ma 0 4 fmjtdi i cu, cd 4, 8, 12, 16ma 0 5 jtdi i cu, cd 4, 8, 12, 16ma 0 6 btjtdi i cu, cd 4, 8, 12, 16ma 0 cmdat1 0 gpio48 io cu, cd 4, 8, 12, 16ma 0 1 cmdat1 i cu, cd 4, 8, 12, 16ma 0 2 cmcsd1 i cu, cd 4, 8, 12, 16ma 0 4 fmjtms i cu, cd 4, 8, 12, 16ma 0 5 jtms i cu, cd 4, 8, 12, 16ma 0 6 btjtms i cu, cd 4, 8, 12, 16ma 0 cmdat2 0 gpio49 io cu, cd 4, 8, 12, 16ma 0 1 cmdat2 i cu, cd 4, 8, 12, 16ma 0 2 scl io cu, cd 4, 8, 12, 16ma 0 4 fmjtck i cu, cd 4, 8, 12, 16ma 0 5 jtck i cu, cd 4, 8, 12, 16ma 0 6 btjtck i cu, cd 4, 8, 12, 16ma 0 cmdat3 0 gpio50 io cu, cd 4, 8, 12, 16ma 0 1 cmdat3 i cu, cd 4, 8, 12, 16ma 0 2 lrstb o - 4, 8, 12, 16ma 0 3 mc3da0 io cu, cd 4, 8, 12, 16ma 0 4 daiclk o - 4, 8, 12, 16ma 0 5 jtrck o - 4, 8, 12, 16ma 0 6 btdbgackn o - 4, 8, 12, 16ma 0 cmdat4 0 gpio51 io cu, cd 4, 8, 12, 16ma 0 1 cmdat4 i cu, cd 4, 8, 12, 16ma 0 2 lsa0da1 o - 4, 8, 12, 16ma 0 3 mc3da0 io cu, cd 4, 8, 12, 16ma 0 4 fmjtrstb i cu, cd 4, 8, 12, 16ma 0 5 jtrst_b i cu, cd 4, 8, 12, 16ma 0 6 btjtrst_b i cu, cd 4, 8, 12, 16ma 0 cmdat5 0 gpio52 io cu, cd 4, 8, 12, 16ma 0 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; name aux. function aux. name aux. type pu/pd/ cu/cd driving smt 1 cmdat5 i cu, cd 4, 8, 12, 16ma 0 2 lsck5 o - 4, 8, 12, 16ma 0 3 daipcmout o - 4, 8, 12, 16ma 0 4 u2rxd i cu, cd 4, 8, 12, 16ma 0 7 egnd48 i pd 4, 8, 12, 16ma 0 cmdat6 0 gpio53 io cu, cd 4, 8, 12, 16ma 0 1 cmdat6 i cu, cd 4, 8, 12, 16ma 0 2 lsda1 io pu, cd 4, 8, 12, 16ma 0 3 mc2da2 o - 4, 8, 12, 16ma 0 4 daipcmin i - 4, 8, 12, 16ma 0 cmdat7 0 gpio54 io cu, cd 4, 8, 12, 16ma 0 1 cmdat7 i cu, cd 4, 8, 12, 16ma 0 2 lsdi1 i cu, cd 4, 8, 12, 16ma 0 3 mcda3 o - 4, 8, 12, 16ma 0 4 daipcmout i cu, cd 4, 8, 12, 16ma 0 cmhref 0 gpio55 io cu, cd 4, 8, 12, 16ma 0 1 cmhref i cu, cd 4, 8, 12, 16ma 0 2 lsce0b1 i cu, cd 4, 8, 12, 16ma 0 3 mc3ck i cu, cd 4, 8, 12, 16ma 0 4 daisync o - 4, 8, 12, 16ma 0 cmvref 0 gpio56 io cu, cd 4, 8, 12, 16ma 0 1 cmvref i cu, cd 4, 8, 12, 16ma 0 2 sda io cu, cd 4, 8, 12, 16ma 0 3 eint7 i pd 4, 8, 12, 16ma 0 4 dairst i pd 4, 8, 12, 16ma 0 5 lpte0 i pd 4, 8, 12, 16ma 0 cmpdn 0 gpio57 io cu, cd 4, 8, 12, 16ma 0 1 cmpdn o - 4, 8, 12, 16ma 0 cmmclk 0 gpio58 io cu, cd 4, 8, 12, 16ma 0 1 cmmclk o - 4, 8, 12, 16ma 0 cmpclk 0 gpio59 io cu, cd 4, 8, 12, 16ma 0 1 cmpclk i cu, cd 4, 8, 12, 16ma 0 2 cmcsk i cu, cd 4, 8, 12, 16ma 0 cmrst 0 gpio60 io cu, cd 4, 8, 12, 16ma 0 1 cmrst o - 4, 8, 12, 16ma 0 edidat 0 gpio61 io cu, cd 4, 8, 12, 16ma 0 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; name aux. function aux. name aux. type pu/pd/ cu/cd driving smt 1 edidat io cu,cd 4, 8, 12, 16ma 0 2 pwm o - 4, 8, 12, 16ma 0 3 eint8 i cu,cd 4, 8, 12, 16ma 0 bpi_bus3 0 gpio62 io cu, cd 4, 8, 12, 16ma 0 1 bpibus3 o - 4, 8, 12, 16ma 0 bpi_bus2 0 gpio63 io cu, cd 4, 8, 12, 16ma 0 1 bpibus2 o - 4, 8, 12, 16ma 0 bpi_bus1 0 gpio64 io cu, cd 4, 8, 12, 16ma 0 1 bpibus1 o - 4, 8, 12, 16ma 0 bpi_bus0 0 gpio65 io cu, cd 4, 8, 12, 16ma 0 1 bpibus0 o - 4, 8, 12, 16ma 0 sfsck 0 gpio69 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 sfsck o cu, cd 2,4,6,8,10,12 ,14,16ma 0 2 mc2da1 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 sfswp 0 gpio67 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 sfswp o cu, cd 2,4,6,8,10,12 ,14,16ma 0 2 mc2ck io cu, cd 2,4,6,8,10,12 ,14,16ma 0 sfshold 0 gpio72 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 sfshold o cu, cd 2,4,6,8,10,12 ,14,16ma 0 2 mc2da3 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 sfscs0 0 gpio68 o cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 sfscs0 o cu, cd 2,4,6,8,10,12 ,14,16ma 0 2 mc2da1 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 sfscs1 0 gpio66 o cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 sfscs1 o cu, cd 2,4,6,8,10,12 ,14,16ma 0 sfsin 0 gpio70 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 sfsin io cu, cd 2,4,6,8,10,12 ,14,16ma 0 2 mc2da2 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 sfsout 0 gpio71 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 1 sfsout io cu, cd 2,4,6,8,10,12 ,14,16ma 0 2 mc2mc0 io cu, cd 2,4,6,8,10,12 ,14,16ma 0 sim1_sio 0 gpio73 io cu, cd 2, 4, 6, 8ma 0 1 simsio io cu, cd 2, 4, 6, 8ma 0 sim1_srst 0 gpio74 io cu, cd 2, 4, 6, 8ma 0 1 simsrst io cu, cd 2, 4, 6, 8ma 0 sim2_sio 0 gpio75 io cu, cd 2, 4, 6, 8ma 0 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; name aux. function aux. name aux. type pu/pd/ cu/cd driving smt 1 sim2sio io cu, cd 2, 4, 6, 8ma 0 sim1_sclk 0 gpio76 io cu, cd 2, 4, 6, 8ma 0 1 simsclk io cu, cd 2, 4, 6, 8ma 0 sim2_sclk 0 gpio77 io cu, cd 2, 4, 6, 8ma 0 1 sim2sclk io cu, cd 2, 4, 6, 8ma 0 sim2_srst 0 gpio78 io cu, cd 2, 4, 6, 8ma 0 1 sim2srst io cu, cd 2, 4, 6, 8ma 0 srclkenai 0 gpio105 io cu, cd 4, 8, 12, 16ma 0 1 srclkenai i cu, cd 4, 8, 12, 16ma 0 resetb 0 gpio106 io cu, cd 4, 8, 12, 16ma 0 1 resetb io cu, cd 4, 8, 12, 16ma 0 7 egnd70 i pd 4, 8, 12, 16ma 0 eint12 0 gpio107 io cu, cd 4, 8, 12, 16ma 0 1 eint12 i cu, cd 4, 8, 12, 16ma 0 7 egnd71 i pd 4, 8, 12, 16ma 0 2.2 electrical characteristics 2.2.1 absolute maximum ratings table 8 . absolute maximum ratings for power supply symbol or pin name description min. max. unit vbat_digital digital used battery voltage input - 0.3 +4.3 v vbat_analog analog used battery voltage input - 0.3 +4.3 v vbat_spk vbat input for loud speaker driver - 0.3 +4.3 v vbat_rf rf used battery voltage input - 0.3 +4.3 v vusb ldo output for usb - vusb +3.0 +3.6 v avdd28_fm 2.8v power supply for fm +2.52 +3.08 v avdd28_vrf 2.8v power supply for 2g rf +2.52 +3.08 v avdd28_tcxo 2.8v power supply for 2g tcxo +2.52 +3.08 v avdd28_2gafe 2.8v power supply for 2g afe +2.52 +3.08 v avdd28_abb 2.8v power supply for abb +2.52 +3.08 v avdd28_dbt 2.8v power supply for dbt +2.52 +3.08 v avdd28_abt 2.8v power supply for abt +2.52 +3.08 v dvdd28 2.8v power supply for digital macros in transceiver +2.52 +3.08 v dvdd18 1.8v power supply for digital macros in transceiver +1.62 +1.98 v free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; symbol or pin name description min. max. unit dvdd28_sf 2.8v io power + 2 . 7 +3.6 v 1.8v io power +1.7 +1.98 v dvdd33_msdc 3.3v memory card power +3.0 +3.6 v dvdd18_emi 1.8v emi io power +1.62 +1.98 v dvdd28_fsrc e - fuse blowing power control +2.52 +3.08 v vddk 1. 3 v c ore power +1. 17 +1. 4 3 v table 9 . absolute maximum ratings for voltage input symbol or pin name description min. max. unit vin1 digital input voltage for io type 1 - 0.3 3.08 v vin2 digital input voltage for io type 2 - 0.3 3.08 v vin3 digital input voltage for io type 3 - 0.3 3.08 v vin4 digital input voltage for io type 4 - 0.3 3.08 v vin5 digital input voltage for io type 5 - 0.3 3.08 v vin6 digital input voltage for io type 6 - 0.3 3.08 v table 10 . absolute maximum ratings for storage temperature symbol or pin name description min. max. unit tstg storage temperature - 55 125 o c 2.2.2 recommended operating conditions table 11 . recommended operating conditions for power supply symbol or pin name description min. typ. max. unit vbat_digital digital used battery voltage input 3.4 3.8 4.2 v vbat_analog analog used battery voltage input 3.4 3.8 4.2 v vbat_spk vbat input for loud speaker driver 3.4 3.8 4.2 v vbat_rf rf used battery voltage input 3.4 3.8 4.2 v vusb ldo output for usb - vusb 3.0 3.3 3.6 v avdd28_fm 2.8v power supply for fm 2.6 2.8 3.0 v avdd28_vrf 2.8v power supply for 2g rf 2.65 2.8 2.95 v avdd28_tcxo 2.8v power supply for 2g tcxo 2.65 2.8 2.95 v avdd28_2gafe 2.8v power supply for 2g afe 2.65 2.8 2.95 v avdd28_abb 2.8v power supply for abb 2.6 2.8 3.0 v avdd28_dbt 2.8v power supply for dbt 2.6 2.8 3.0 v avdd28_abt 2.8v power supply for abt 2.6 2.8 3.0 v dvdd28 2.8v power supply for digital macros in transceiver 2.7 2.8 2.9 v free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; symbol or pin name description min. typ. max. unit dvdd18 1.8v power supply for digital macros in transceiver 1.62 1.8 1.98 v dvdd28_sf 2.8v io power 2.7 3.3 3.6 v 1.8v io power 1. 7 1.8 1.98 dvdd33_msdc 3.3v memory card power 3.0 3.3 3.6 v dvdd18_emi 1.8v emi io power 1.62 1.8 1.98 v dvdd28_fsrc e - fuse blowing powr control 2.7 2.8 3.08 v vddk 1.2v c ore power 1. 17 1 .3 1. 4 3 vddk table 12 . recommended operating conditions for voltage input symbol or pin name description min. typ. max. unit vin1 digital input voltage for io type 1 - 0.3 - dvdio+0.3 v vin2 digital input voltage for io type 2 - 0.3 - dvdio+0.3 v vin3 digital input voltage for io type 3 - 0.3 - dvdio+0.3 v vin4 digital input voltage for io type 4 - 0.3 - dvdio+0.3 v vin5 digital input voltage for io type 5 - 0.3 - dvdio+0.3 v vin6 digital input voltage for io type 6 - 0.3 - dvdio+0.3 v vin 7 digital input voltage for io type 7 - 0.3 - dvdio+0.3 v table 13 . recommended operating conditions for operating temperature symbol or pin name description min. typ max. unit tc operating temperature - 20 - 85 o c 2.2.3 electrical characteristics under recommended operating conditions table 14 . electrical characteristics symbol description condition min. typ. max. unit diih1 digital high input current for io t ype 1 pu/pd disabled, dvdio = 2.8v, 2.1 < vin1 < 3.1 - 5 - 5 a pu enabled, dvdio = 2.8v, 2.1 < vin1 < 3.1 - 22.5 - 12.5 pd enabled, dvdio = 2.8v, 2.1 o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; symbol description condition min. typ. max. unit pu enabled, dvdio = 2.8v, 2.1 < vin2 < 3.1 - 22.5 - 12.5 pd enabled, dvdio = 2.8v, 2.1 o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; symbol description condition min. typ. max. unit resistance for io t ype 2 dvdio = 1.8v 70 150 320 k dvoh2 digital output high voltage for io t ype 2 dvdio = 2.8v 2.38 v dvdio = 1.8v 1.53 v dvol2 digital output low voltage for io t ype 2 dvdio = 2.8v 0.42 v dvdio = 1.8v 0.27 v diih3 digital high input current for io t ype 3 pu/pd disabled, dvdio = 2.8v, 2.1 < vin3 < 3.1 - 5 - 5 a pu enabled, dvdio = 2.8v, 2.1 < vin3 < 3.1 - 22.5 - 12.5 pd enabled, dvdio = 2.8v, 2.1 < vin3 < 3.1 6.1 - 82.5 pu/pd disabled, dvdio = 1.8v, 1.35 < vin3 < 2.1 - 5 - 5 a pu enabled, dvdio = 1.8v, 1.35 < vin3 < 2.1 - 11.4 - 9.3 pd enabled, dvdio = 1.8v, 1.35 < vin3 < 2.1 - 0.8 - 35 diil3 digital low input current for io t ype 3 pu/pd disabled, dvdio = 2.8v, - 0.3 < vin3 < 0.7 - 5 - 5 a pu enabled, dvdio = 2.8v, - 0.3 < vin3 < 0.7 - 82.5 - - 6.1 pd enabled, dvdio = 2.8v, - 0.3 < vin3 < 0.7 - 12.5 - 22.5 pu/pd disabled, dvdio = 1.8v, - 0.3 < vin3 < 0.45 - 5 - 5 a pu enabled, dvdio = 1.8v, - 0.3 < vin3 < 0.45 - 35 - 0.8 pd enabled, dvdio = 1.8v, - 0.3 < vin3 < 0.45 - 9.3 - 11.4 dioh3 digital high output current for io t ype 3 dvoh > 2.38v, dvdio = 2.8v - 16 - - ma free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; symbol description condition min. typ. max. unit dvoh > 1.53v, dvdio = 1.8v - 12 - - ma diol3 digital low output current for io t ype 3 dvol < 0.42v, dvdio = 2.8v - - 16 ma dvol < 0.27v, dvdio = 1.8v - - 12 ma drpu3 digital i/o pull - up resistance for io t ype 3 dvdio = 2.8v 10 47 100 k dvdio = 1.8v 10 47 100 k drpd3 digital i/o pull - down resistance for io t ype 3 dvdio = 2.8v 10 47 100 k dvdio = 1.8v 10 47 100 k dvoh3 digital output high voltage for io t ype 3 dvdio = 2.8v 2.38 v dvdio = 1.8v 1.53 v dvol3 digital output low voltage for io t ype 3 dvdio = 2.8v 0.42 v dvdio = 1.8v 0.27 v diih4 digital high input current for io t ype 4 pu/pd disabled, dvdio = 2.8v, 2.1 < vin4 < 3.1 - 5 - 5 a pu enabled, dvdio = 2.8v, 2.1 < vin4 < 3.1 - 22.5 - 12.5 pd enabled, dvdio = 2.8v, 2.1 < vin4 < 3.1 6.1 - 82.5 pu/pd disabled, dvdio = 1.8v, 1.35 < vin4 < 2.1 - 5 - 5 a pu enabled, dvdio = 1.8v, 1.35 < vin4 < 2.1 - 11.4 - 9.3 pd enabled, dvdio = 1.8v, 1.35 < vin4 < 2.1 - 0.8 - 35 diil4 digital low input current for io t ype 4 pu/pd disabled, dvdio = 2.8v, - 0.3 < vin4 < 0.7 - 5 - 5 a pu enabled, dvdio = 2.8v, - 0.3 < vin4 < 0.7 - 82.5 - - 6.1 pd enabled, dvdio = 2.8v, - 0.3 < vin4 < 0.7 - 12.5 - 22.5 free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; symbol description condition min. typ. max. unit pu/pd disabled, dvdio = 1.8v, - 0.3 < vin4 < 0.45 - 5 - 5 a pu enabled, dvdio = 1.8v, - 0.3 < vin4 < 0.45 - 35 - 0.8 pd enabled, dvdio = 1.8v, - 0.3 < vin4 < 0.45 - 9.3 - 11.4 dioh4 digital high output current for io t ype 4 dvoh > 2.38v, dvdio = 2.8v - 16 - - ma dvoh > 1.53v, dvdio = 1.8v - 12 - - ma diol4 digital low output current for io t ype 4 dvol < 0.42v, dvdio = 2.8v - - 16 ma dvol < 0.27v, dvdio = 1.8v - - 12 ma drpu4 digital i/o pull - up resistance for io t ype 4 (gpio mode) dvdio = 2.8v 40 75 190 k dvdio = 1.8v 70 150 320 k drpd4 digital i/o pull - down resistance for io t ype 4 (gpio mode) dvdio = 2.8v 40 75 190 k dvdio = 1.8v 70 150 320 k drpu4 200k digital i/o pull - up resistance for io t ype 4 (key pad mode) dvdio = 2.8v 200 - 380 k drpd4 200k digital i/o pull - down resistance for io t ype 4 (key pad mode) dvdio = 2.8v 200 - 380 k dvoh4 digital output high voltage for io t ype 4 dvdio = 2.8v 2.38 v dvdio = 1.8v 1.53 v dvol4 digital output low voltage for io t ype 4 dvdio = 2.8v 0.42 v dvdio = 1.8v 0.27 v diih5 digital high input current for io t ype 5 pu/pd disabled, dvdio = 2.8v, 2.1 < vin5 < 3.1 - 5 - 5 a pu enabled, dvdio = 2.8v, 2.1 < vin5 < 3.1 - 22.5 - 12.5 pd enabled, dvdio = 2.8v, 2.1 < vin5 < 3.1 6.1 - 82.5 pu/pd disabled, dvdio = 1.8v, 1.35 < vin5 < 2.1 - 5 - 5 a free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; symbol description condition min. typ. max. unit pu enabled, dvdio = 1.8v, 1.35 < vin5 < 2.1 - 11.4 - 9.3 pd enabled, dvdio = 1.8v, 1.35 < vin5 < 2.1 - 0.8 - 35 diil5 digital low input current for io t ype 5 pu/pd disabled, dvdio = 2.8v, - 0.3 < vin5 < 0.7 - 5 - 5 a pu enabled, dvdio = 2.8v, - 0.3 < vin5 < 0.7 - 82.5 - - 6.1 pd enabled, dvdio = 2.8v, - 0.3 < vin5 < 0.7 - 12.5 - 22.5 pu/pd disabled, dvdio = 1.8v, - 0.3 < vin5 < 0.45 - 5 - 5 a pu enabled, dvdio = 1.8v, - 0.3 < vin5 < 0.45 - 35 - 0.8 pd enabled, dvdio = 1.8v, - 0.3 < vin5 < 0.45 - 9.3 - 11.4 dioh5 digital high output current for io t ype 5 dvoh > 2.38v, dvdio = 2.8v - 16 - - ma dvoh > 1.53v, dvdio = 1.8v - 12 - - ma diol5 digital low output current for io t ype 5 dvol < 0.42v, dvdio = 2.8v - - 16 ma dvol < 0.27v, dvdio = 1.8v - - 12 ma drpu5 digital i/o pull - up resistance for io t ype 5 (gpio mode) dvdio = 2.8v 40 75 190 k dvdio = 1.8v 70 150 320 k drpd5 digital i/o pull - down resistance for io t ype 5 (gpio mode) dvdio = 2.8v 40 75 190 k dvdio = 1.8v 70 150 320 k drpu5 2k digital i/o pull - up resistance for io t ype 4 (key pad mode) dvdio = 2.8v 1 - 2 k drpd5 2k digital i/o pull - down resistance for io t ype 4 (key pad mode) dvdio = 2.8v 1 - 2 k dvoh5 digital output high voltage for io t ype 5 dvdio = 2.8v 2.38 v dvdio = 1.8v 1.53 v dvol5 digital output low dvdio = 2.8v 0.42 v free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; symbol description condition min. typ. max. unit voltage for io t ype 5 dvdio = 1.8v 0.27 v diih6 digital high input current for io t ype 6 pu/pd disabled, dvdio = 2.8v, 2.1 < vin6 < 3.1 - 5 - 5 a pu enabled, dvdio = 2.8v, 2.1 < vin6 < 3.1 - 22.5 - 12.5 pd enabled, dvdio = 2.8v, 2.1 < vin6 < 3.1 6.1 - 82.5 pu/pd disabled, dvdio = 1.8v, 1.35 < vin6 < 2.1 - 5 - 5 a pu enabled, dvdio = 1.8v, 1.35 < vin6 < 2.1 - 11.4 - 9.3 pd enabled, dvdio = 1.8v, 1.35 < vin6 < 2.1 - 0.8 - 35 diil6 digital low input current for io t ype 6 pu/pd disabled, dvdio = 2.8v, - 0.3 < vin6 < 0.7 - 5 - 5 a pu enabled, dvdio = 2.8v, - 0.3 < vin6 < 0.7 - 82.5 - - 6.1 pd enabled, dvdio = 2.8v, - 0.3 < vin6 < 0.7 - 12.5 - 22.5 pu/pd disabled, dvdio = 1.8v, - 0.3 < vin6 < 0.45 - 5 - 5 a pu enabled, dvdio = 1.8v, - 0.3 < vin6 < 0.45 - 35 - 0.8 pd enabled, dvdio = 1.8v, - 0.3 < vin6 < 0.45 - 9.3 - 11.4 dioh6 digital high output current for io t ype 6 dvoh > 2.38v, dvdio = 2.8v - 8 - - ma dvoh > 1.53v, dvdio = 1.8v - 6 - - ma diol6 digital low output current for io t ype 6 dvol < 0.42v, dvdio = 2.8v - - 8 ma dvol < 0.27v, dvdio = 1.8v - - 6 ma drpu6 digital i/o pull - up dvdio = 2.8v 40 85 190 k free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; symbol description condition min. typ. max. unit resistance for io t ype 6 dvdio = 1.8v 70 150 320 k drpd6 digital i/o pull - down resistance for io t ype 6 dvdio = 2.8v 40 85 190 k dvdio = 1.8v 70 150 320 k dvoh6 digital output high voltage for io t ype 6 dvdio = 2.8v 2.38 v dvdio = 1.8v 1.53 v dvol6 digital output low voltage for io t ype 6 dvdio = 2.8v 0.42 v dvdio = 1.8v 0.27 v diih 7 digital high input current for io t ype 7 pu/pd disabled, dvdio = 2.8v, 2.1 < vin 7 < 3.1 - 5 - 5 a pu enabled, dvdio = 2.8v, 2.1 < vin 7 < 3.1 - 22.5 - 12.5 pd enabled, dvdio = 2.8v, 2.1 o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; 2.3 package information 2.3.1 package outlines free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; figure 5 . outlines and d imension of tfbga 9.6 mm* 8 .6mm, 199 - ball, 0.5 mm pitch p ackage free datasheet http:/// o r j l q l g v r q j f r q j o l q # k r q j \ x f r p f r p w l p h l s g r f w l w o h 0 7 * 6 0 * 3 5 6 ( ' * ( 5 ; 6 2 & 3 u r f h v v r u 7 h f k q l f d o % u l h i y g u d i w s g i f r p s d q \ + r q j \ x b : & ; 2.3.2 thermal operating specifications symbol description value unit notes thermal resistance from device junction to package case 48 c/w maximum p ackage t emperature 65 deg c maximum power dissipation 1.28 w 2.3.3 lead - free packaging MT6260 is provided in a lead - free package and meets rohs requirements 2.4 ordering information 2.4.1 top marking definition figure 6 . mass production t op m ark ing of MT6260 part n umber package description MT6260a/bmb - pcu - h tfbga 8 . 6 mm* 9.6 mm, 199 - ball, 0.5 mm pitch package, non - security version m t x x x x x x p r o d u c t n o . d d d d : d a t e c o d e # # # # : s u b c o n t r a c t o r c o d e l l l l l l : d i e l o t n o . m e d i a t e k a r m m t 6 x x x x d d d d - # # # # l l l l l l free datasheet http:/// |
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